Wafer Level Reliability Training Course

Day One:

I. Wafer Level Reliability: Introduction

A. Wafer Level Qualification

1. JP-001
2. WLR – PLR: Same Stress, Same Results
3. Probing Challanges

B. Introduction: Wafer Level Reliability for Process Monitoring

1. Tool to Drive Steady Reliability Improvement
2. Statistically Significant Samples
3. Statistical Process Control, not conformance verification
4. Fix Future Problems before generation of scrap
5. Single Stress Point Verification

Lunch

II. Wafer Level Metal Testing

A. Electromigration

1. Basic Physics

a. Bulk, Grain boundary, Interface and Surface Diffusion
b. Thermal Effects vs. Current Density Effects

2. Temperature and TCR
3. Isothermal Test
4. SWEAT Test
5. Self Heated Technique
6. Via Electromigration
7. Contact Electromigration
8. Array Techniques
9. Parallel/serial Testing
10. Special Cu Issues

B. Stress Migration

1. Basic Physics
2. Thermal Expansion Mismatch
3. Thermal Effects
4. Resistance Effects
5. Failure Criteria Effects
6. Line test structure design
7. Via test structure design

Day Two:

III. Gate Dielectric Reliability

A. Time Dependent Dielectric Breakdown

1. Basic Physics

a. Voltage Driven not field
b. Interface Hole Traps
c. Trap Assisted Tunneling

B. Test Structure Design

1. Test Artifacts
2. Noise Limited Measurements

C. Plasma and Process Induced Damage

1. Basic Physics
2. Ion Implantation Damage
3. Plasma Etch Damage
4. Plasma Deposition Damge
5. Test Structure Design

Lunch

III. Transistor Instabilities

A. NBTI

1. Basic Physics
2. Test Structure Design
3. Accelerated Testing

B. HCI

1.Basic Physics
2. Test Structure Design
3. Accelerated Testin

C. Mobile Ions

1. Basic Physics
2. BTS
3. TVS
4. Self Heated Test Structure

IV. Questions and discussion of Data

V. Summary

Trainer : Tim Turner

Courses

Reliability Training Course:
-Data analysis and reporting

Wafer Level Reliability

Package Level Reliability

ESD and Latch-Up